Earlier this year, the AXIe Consortium added new capabilities to the AXIe Base Specification. If you are unfamiliar with AXIe, it is a modular instrument standard best described as the “big brother to PXI.” Like PXI, it hosts pluggable instrument and controller modules into a chassis, using PCIe (PCI Express) as a high-speed data fabric. However, the modules are larger than PXI and typically placed horizontally in a chassis. These larger modules allow power dissipation up to 200 watts/slot, suitable for high-speed data converters and digital test. You can read my recent AXIe tutorial here.
While AXIe consists of multiple standards numbered AXIe-n, where n represents a certain layer in the specification hierarchy, most references to AXIe assume AXIe-1, the Base Architecture specification. You can see the list of all specifications on the AXIe Consortium specification page.
So what did the AXIe Consortium change in the AXIe-1 specification? There are two substantial changes to the spec. First, it allowed expansion of the PCIe fabric from 4 lanes to 16 lanes, quadrupling data bandwidth. This capability is known as “Wide PCI Express.” Second, it made provisions for lower cost LAN-based modules.
You can read more details, and the significance of these enhancements, at my complete article here.